The present invention relates to the structure of a current bit cell intended to be used in switched current networks as, for example, in the implementation of analogue/digital converters ADCs.
The benefit of this structure resides in its capacity to produce networks of current bit cells with high density, a single type of device, and a decoding scheme allowing techniques to be applied which ensure the production of a monotonic device which minimises the matching errors.
Another advantage of this structure is the symmetry of its topology, which makes it suitable for the implementation of differential networks whose characteristics, connected with the unsusceptibility to noise, are attractive for the implementation of analogue circuits.
One known means of ensuring monotonicity, for example in a digital/analogue converter, is to add an element to each increment of a digital code.
Furthermore, it is also well known that the use of a "centroid" topology allows first-order minimisation of the errors resulting from matching gradients in integrated-circuit technology.
The use of the two techniques mentioned above requires a highly complex decoding scheme for each individual current bit cell.
It furthermore requires the use of N-type and P-type transistors, which means that the packing density of the cell cannot be optimised because of the need for two different types of substrate.
It furthermore has an asymmetric decoding structure which makes the cell inappropriate for differential networks.
The object of the invention is to overcome the aforementioned drawbacks of known current bit cell structures.
Its subject is therefore a current bit cell comprising a current source, means for detecting the presence of a digital signal bit and means for detecting at least one command signal so as to command, on a first output of the cell, the appearance of a current delivered by the current source as a function of the digital signal applied to the said cell and of the said at least one command signal, characterized in that it furthermore includes means for detecting the presence of a bit complementary to the bit of the digital signal and means for detecting the complement of the said at least one command signal, so as to command on a second output of the cell the appearance of a current delivered by the current source which is the complement of the current delivered on the first output, the said means for detecting the presence of bits and of the said at least one command signal, the said means for detecting the presence of complementary bits and of complementary command signals and the said current source being embodied with the aid of field-effect transistors of the same type.